TY - GEN
T1 - Design-for-secure-test for crypto cores
AU - Shi, Youhua
AU - Togawa, Nozomu
AU - Yanagisawa, Masao
AU - Ohtsuki, Tatsuo
PY - 2009/12/15
Y1 - 2009/12/15
N2 - Scan technology carries the potential of being misused as a "side channel" to leak out the secret information of crypto cores. To address such a design challenge, this paper proposes a design-for-secure-test (DFST) solution for crypto cores by adding a stimuli-launched flip-flop into the traditional scan flip-flop to maintain the high test quality without compromising the security.
AB - Scan technology carries the potential of being misused as a "side channel" to leak out the secret information of crypto cores. To address such a design challenge, this paper proposes a design-for-secure-test (DFST) solution for crypto cores by adding a stimuli-launched flip-flop into the traditional scan flip-flop to maintain the high test quality without compromising the security.
UR - http://www.scopus.com/inward/record.url?scp=76549083901&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=76549083901&partnerID=8YFLogxK
U2 - 10.1109/TEST.2009.5355900
DO - 10.1109/TEST.2009.5355900
M3 - Conference contribution
AN - SCOPUS:76549083901
SN - 9781424448678
T3 - Proceedings - International Test Conference
BT - International Test Conference, ITC 2009 - Proceedings
T2 - International Test Conference, ITC 2009
Y2 - 1 November 2009 through 6 November 2009
ER -