Dopant profile engineering of CMOS devices formed by non-melt laser spike annealing

Akio Shima; Yun Wang; Deepak Upadhyaya; Lucia Feng; Somit Talwar; Atsushi Hiraiwa

doi:10.1109/.2005.1469246

Dopant profile engineering of CMOS devices formed by non-melt laser spike annealing

Akio Shima^*, Yun Wang, Deepak Upadhyaya, Lucia Feng, Somit Talwar, Atsushi Hiraiwa

^*この研究の対応する著者

研究成果: Conference contribution

抄録

We optimized the halo profile and deep source/drain junction profile of the devices that were fabricated by non-melt laser spike annealing (LSA). The optimized devices achieved 10%- and 20%-better performance compared to those by the conventional LSA and rapid thermal annealing (RTA), respectively. The hot carrier degradation was also reduced to an RTA-comparable level by the halo optimization. From these results we concluded that the dopant profile engineering specific to LSA is a key to obtaining good device performance and that the devices by the optimized LSA process are the most promising for hp65-node and beyond.

本文言語	English
ホスト出版物のタイトル	Digest of Technical Papers - Symposium on VLSI Technology
ページ	144-145
ページ数	2
巻	2005
DOI	https://doi.org/10.1109/.2005.1469246
出版ステータス	Published - 2005
外部発表	はい
イベント	2005 Symposium on VLSI Technology - Kyoto, Japan 継続期間: 2005 6月 14 → 2005 6月 14

Other

Other	2005 Symposium on VLSI Technology
国/地域	Japan
City	Kyoto
Period	05/6/14 → 05/6/14

ASJC Scopus subject areas

電子工学および電気工学

文献へのアクセス

10.1109/.2005.1469246

他のファイルとリンク

引用スタイル

@inproceedings{eed9a9a3f5d243a4b349136d858482f0,

title = "Dopant profile engineering of CMOS devices formed by non-melt laser spike annealing",

abstract = "We optimized the halo profile and deep source/drain junction profile of the devices that were fabricated by non-melt laser spike annealing (LSA). The optimized devices achieved 10%- and 20%-better performance compared to those by the conventional LSA and rapid thermal annealing (RTA), respectively. The hot carrier degradation was also reduced to an RTA-comparable level by the halo optimization. From these results we concluded that the dopant profile engineering specific to LSA is a key to obtaining good device performance and that the devices by the optimized LSA process are the most promising for hp65-node and beyond.",

author = "Akio Shima and Yun Wang and Deepak Upadhyaya and Lucia Feng and Somit Talwar and Atsushi Hiraiwa",

year = "2005",

doi = "10.1109/.2005.1469246",

language = "English",

volume = "2005",

pages = "144--145",

booktitle = "Digest of Technical Papers - Symposium on VLSI Technology",

note = "2005 Symposium on VLSI Technology ; Conference date: 14-06-2005 Through 14-06-2005",

}

TY - GEN

T1 - Dopant profile engineering of CMOS devices formed by non-melt laser spike annealing

AU - Shima, Akio

AU - Wang, Yun

AU - Upadhyaya, Deepak

AU - Feng, Lucia

AU - Talwar, Somit

AU - Hiraiwa, Atsushi

PY - 2005

Y1 - 2005

N2 - We optimized the halo profile and deep source/drain junction profile of the devices that were fabricated by non-melt laser spike annealing (LSA). The optimized devices achieved 10%- and 20%-better performance compared to those by the conventional LSA and rapid thermal annealing (RTA), respectively. The hot carrier degradation was also reduced to an RTA-comparable level by the halo optimization. From these results we concluded that the dopant profile engineering specific to LSA is a key to obtaining good device performance and that the devices by the optimized LSA process are the most promising for hp65-node and beyond.

AB - We optimized the halo profile and deep source/drain junction profile of the devices that were fabricated by non-melt laser spike annealing (LSA). The optimized devices achieved 10%- and 20%-better performance compared to those by the conventional LSA and rapid thermal annealing (RTA), respectively. The hot carrier degradation was also reduced to an RTA-comparable level by the halo optimization. From these results we concluded that the dopant profile engineering specific to LSA is a key to obtaining good device performance and that the devices by the optimized LSA process are the most promising for hp65-node and beyond.

UR - http://www.scopus.com/inward/record.url?scp=33745170708&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33745170708&partnerID=8YFLogxK

U2 - 10.1109/.2005.1469246

DO - 10.1109/.2005.1469246

M3 - Conference contribution

AN - SCOPUS:33745170708

VL - 2005

SP - 144

EP - 145

BT - Digest of Technical Papers - Symposium on VLSI Technology

T2 - 2005 Symposium on VLSI Technology

Y2 - 14 June 2005 through 14 June 2005

ER -

Dopant profile engineering of CMOS devices formed by non-melt laser spike annealing

抄録

Other

ASJC Scopus subject areas

文献へのアクセス

他のファイルとリンク

フィンガープリント

引用スタイル