A process was developed for producing a barrier layer of NiB by means of electroless deposition on an underlayer of Pd-activated organosilane monolayer formed on the insulator. An attempt was made to decrease the thickness of the NiB layer without adversely affecting its barrier property to make it compatible with further miniaturized ultralarge-scale integration (ULSI) devices of the future. This aim was achieved by using 3-[2-(2-aminoethylamino)ethylamino] propyltrimethoxysilane (TAS) as the underlayer between the NiB layer and the substrate. By using TAS instead of 3-aminopropyltriethoxysilane (APTES) which was used in our previous study, the minimum acceptable thickness of the NiB barrier layer was successfully reduced to 6 nm. The copper deposit formed on the barrier layer in trenches was free of defects, and it was stable even after annealing at 400°C for 30 min.
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