Electroless diffusion barrier process using SAM on low-k dielectrics

M. Yoshino*, T. Masuda, T. Yokoshima, J. Sasano, Y. Shacham-Diamand, I. Matsuda, T. Osaka, Y. Hagiwara, I. Sato


研究成果: Article査読

31 被引用数 (Scopus)


A wet process based on electroless deposition is proposed for the formation of a diffusion barrier layer for Cu wiring in ultra-large scale integration (ULSI) technology. The diffusion barrier layer is formed on a low-dielectric constant (low- k) inter level film. In this process, a Pd-activated self-assembled monolayer as a seed/adhesion layer was used as a key step to allow electroless deposition on a dielectric film. The effectiveness of this approach was demonstrated by depositing an electroless NiB layer as the diffusion barrier layer. The electrolessly deposited NiB layer showed a uniform surface, a small grain size, and a high adhesion when deposited on various common inter level dielectric materials with low dielectric constant. The electrolessly deposited NiB layer formed on the low- k dielectric film by this method showed a high thermal stability of the effectiveness as a barrier to Cu diffusion at temperatures up to 400°C for 30 min. The electroless process was found to be reproducible and did not affect dielectric properties of the underlying insulator.

ジャーナルJournal of the Electrochemical Society
出版ステータスPublished - 2007 2月 19

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 再生可能エネルギー、持続可能性、環境
  • 表面、皮膜および薄膜
  • 電気化学
  • 材料化学


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