Fabrication of an integrated microprobing head for fault analysis of mos integrated circuits

The fabrication of an integrated microprobing head for fault analysis of MOS ICs is described. The micrpoprobe is etched out from a silicon wafer to a tip size of about 10 μm and it has an NMOS impedance transformer intergrated very close to the tip. The input capacitance of this device is smaller than 0.1 pF and the delay time (at 50% of the final value) is lower than 100 ns at a 100 kΩ signal source resitance. This is a significant improvement n the response time of a conventional microprobe.