Fabrication of flat micro-gap electrodes for molecular electronics

Tomohiko Edura, Jun Mizuno, Ken Tsutsui, Mikiko Saito, Masahide Tokuda, Harumasa Onozato, Toshiko Koizumi, Yasuo Wada, Masamitsu Haemori, Hideomi Koinuma

研究成果: Article査読

4 被引用数 (Scopus)

抄録

Recently, organic molecular electronic devices such as molecular thin-film transistors have received considerable attention as possible candidates for next-generation electronic and optical devices. This paper reports on fabrication technologies of flat metallic electrodes on insulating substrates with a micrometer separation for high-performance molecular device evaluation. The key technologies of fabricating planar-type electrodes are the liftoff method by the combination of bilayer photoresist with overhang profile, electron beam evaporation of thin metal (Ti and Au) films, and SiO2-CMP (Chemical Mechanical Polishing) method of CVD (Chemical Vapor Deposition-deposited TEOS (tetraethoxysilane)-SiO2 layer. The raggedness of the electrode/insulator interface and the electrode surface of the micro-gap electrodes were less than 3 nm. The isolation characteristics of fabricated electrodes were on the order of 1013 ohms at room temperature, which is sufficient for evaluating electronic properties of organic thin-film devices. Finally, pentacene FET (Field Effect Transistor) characteristics are discussed fabricated on the micro-gap flat electrodes. The mobility of this FET was 0.015 cm2/Vs, which was almost on the order of the previous results. These results suggest that high-performance organic thin-film transistors can be realized on these advanced electrode structures.

本文言語English
ページ(範囲)39-46
ページ数8
ジャーナルElectrical Engineering in Japan (English translation of Denki Gakkai Ronbunshi)
152
2
DOI
出版ステータスPublished - 2005 7月 1

ASJC Scopus subject areas

  • エネルギー工学および電力技術
  • 電子工学および電気工学

フィンガープリント

「Fabrication of flat micro-gap electrodes for molecular electronics」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル