This paper describes a new automatic test pattern generation system called FANTCAD which achieves a high fault coverage for full-scan designs. This ATPG system incorporates the latest algorithms for implication, unique path sensitization, and fault simulation. It has been extended for designs which contain bidirectional I/O, buses, scan flip-flops with asynchronous preset/clear, and embedded RAM. FANTCAD has generated test patterns for all testable faults and identified all redundant faults for 150-Kgate designs within four hours per design. This paper also gives experimental results for actual full-scan designs.
|ジャーナル||Fujitsu Scientific and Technical Journal|
|出版ステータス||Published - 1995|
ASJC Scopus subject areas