TY - GEN
T1 - Fully-integrated novel high efficiency linear CMOS power amplifier for 5.8 GHz ETC applications
AU - Suh, Yong Ju
AU - Sun, Jiangtao
AU - Horie, Koji
AU - Itoh, Nobuyuki
AU - Yoshimasu, Toshihiko
PY - 2009/12/1
Y1 - 2009/12/1
N2 - A fully integrated novel power amplifier (PA) using 130nm CMOS process is presented for Electric Toll Collection (ETC) applications. To obtain good efficiency and high linear gain performance, a novel cascode PA based on a class E PA has been designed, fabricated and fully measured. The proposed PA is a single-ended single-stage amplifier at an operating voltage of only 2 V. The power added efficiency (PAE) of the PA is as high as 42.6% with a gain of 11.4dB at P1dB of 13.4dBm. This CMOS PA includes all matching circuits and biasing circuits, and no external components are required.
AB - A fully integrated novel power amplifier (PA) using 130nm CMOS process is presented for Electric Toll Collection (ETC) applications. To obtain good efficiency and high linear gain performance, a novel cascode PA based on a class E PA has been designed, fabricated and fully measured. The proposed PA is a single-ended single-stage amplifier at an operating voltage of only 2 V. The power added efficiency (PAE) of the PA is as high as 42.6% with a gain of 11.4dB at P1dB of 13.4dBm. This CMOS PA includes all matching circuits and biasing circuits, and no external components are required.
KW - CMOS
KW - Electric toll collection
KW - High efficiency
KW - Power amplifier
UR - http://www.scopus.com/inward/record.url?scp=77950636622&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77950636622&partnerID=8YFLogxK
U2 - 10.1109/APMC.2009.5384529
DO - 10.1109/APMC.2009.5384529
M3 - Conference contribution
AN - SCOPUS:77950636622
SN - 9781424428021
T3 - APMC 2009 - Asia Pacific Microwave Conference 2009
SP - 365
EP - 368
BT - APMC 2009 - Asia Pacific Microwave Conference 2009
T2 - Asia Pacific Microwave Conference 2009, APMC 2009
Y2 - 7 December 2009 through 10 December 2009
ER -