@article{7a1cd596aede4fcc914a0294197402b4,
title = "Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding",
abstract = "This paper describes a heterogeneous multi-core processor (HMCP) architecture that integrates general-purpose processors (CPUs) and accelerators (ACCs) to achieve exceptional performance as well as low-power consumption for the SoCs of embedded systems. The memory architectures of CPUs and ACCs were unified to improve programming and compiling efficiency. Advanced audio codec-low complexity (AAC-LC) stereo audio encoding was parallelized on a heterogeneous multi-core having homogeneous processor cores and dynamically reconfigurable processor (DRP) ACC cores in a preliminary evaluation of the HMCP architecture. The performance evaluation revealed that 54x AAC encoding was achieved on the chip with two CPUs at 600 MHz and two DRPs at 300 MHz, which achieved encoding of an entire CD within 1-2 min.",
keywords = "AAC encoding, Accelerator, Dynamically reconfigurable processor, Heterogeneous multi-core, Parallel processing",
author = "Hiroaki Shikano and Masaki Ito and Masafumi Onouchi and Takashi Todaka and Takanobu Tsunoda and Tomoyuki Kodama and Kunio Uchiyama and Toshihiko Odaka and Tatsuya Kamei and Ei Nagahama and Manabu Kusaoke and Yusuke Nitta and Yasutaka Wada and Keiji Kimura and Hironori Kasahara",
note = "Funding Information: Manuscript received September 8, 2007; revised December 3, 2007. Part of this work was supported by NEDO Advanced Heterogeneous Multiprocessor. H. Shikano, M. Ito, M. Onouchi, T. Todaka, T. Tsunoda, T. Kodama, K. Uchiyama, and T. Odaka are with Hitachi, Ltd., Tokyo 185-8601, Japan (e-mail: hiroaki.shikano.gm@hitachi.com). T. Kamei, E. Nagahama, M. Kusaoke, and Y. Nitta are with Renesas Technology Corporation, Tokyo 187-8588, Japan. H. Shikano, Y. Wada, K. Kimura, and H. Kasahara are with the Department of Computer Science, Waseda University, Tokyo 169-8555, Japan. Digital Object Identifier 10.1109/JSSC.2008.917531",
year = "2008",
month = jan,
doi = "10.1109/JSSC.2008.917531",
language = "English",
volume = "43",
pages = "902--908",
journal = "IEEE Journal of Solid-State Circuits",
issn = "0018-9200",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "4",
}