TY - GEN
T1 - Implementation evaluation of scan-based attack against a Trivium cipher circuit
AU - Oku, Daisuke
AU - Yanagisawa, Masao
AU - Togawa, Nozomu
N1 - Publisher Copyright:
© 2016 IEEE.
Copyright:
Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2017/1/3
Y1 - 2017/1/3
N2 - Scan-path test, which is one of design-for-test techniques using a scan chain, can control and observe internal registers in an LSI chip. However, attackers can also use it to retrieve secret information from cipher circuits. Recently, scan-based attacks using a scan chain inside an LSI chip is reported which can restore secret information by analyzing the scan data during cryptographic processing. In this paper, we pick up a scan-based attack method against a Trivium cipher, one of synchronous stream ciphers, and evaluate it using the FPGA platform called SASEBO-GII. We implement the Trivium cipher on the FPGA chip and perform the scan-based attack against it. We demonstrate that the scan-based attack can successfully restore the secret information in the FPGA chip within several minutes, even if the FPGA chip contains several circuits other than the Trivium cipher circuit, which reveals that the scan-based attack against the Trivium cipher is not only a simulation threat but a real threat.
AB - Scan-path test, which is one of design-for-test techniques using a scan chain, can control and observe internal registers in an LSI chip. However, attackers can also use it to retrieve secret information from cipher circuits. Recently, scan-based attacks using a scan chain inside an LSI chip is reported which can restore secret information by analyzing the scan data during cryptographic processing. In this paper, we pick up a scan-based attack method against a Trivium cipher, one of synchronous stream ciphers, and evaluate it using the FPGA platform called SASEBO-GII. We implement the Trivium cipher on the FPGA chip and perform the scan-based attack against it. We demonstrate that the scan-based attack can successfully restore the secret information in the FPGA chip within several minutes, even if the FPGA chip contains several circuits other than the Trivium cipher circuit, which reveals that the scan-based attack against the Trivium cipher is not only a simulation threat but a real threat.
UR - http://www.scopus.com/inward/record.url?scp=85011115905&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85011115905&partnerID=8YFLogxK
U2 - 10.1109/APCCAS.2016.7803938
DO - 10.1109/APCCAS.2016.7803938
M3 - Conference contribution
AN - SCOPUS:85011115905
T3 - 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
SP - 220
EP - 223
BT - 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
Y2 - 25 October 2016 through 28 October 2016
ER -