抄録
In this paper, a low power parallel surveillance video encoding system based on joint power-speed scheduling is proposed. The relative relationships among the CPU statuses, total power consumption and encoding speed are analyzed and modeled for multi-core processors. Based on the power directional graph and the relative encoding speed model, the working statuses of the cores are controlled jointly adapting to video encoding workload to minimize the total power consumption. It provides more than 20% power reduction compared with the latest existing system without a penalty on the encoding speed.
本文言語 | English |
---|---|
ホスト出版物のタイトル | 2011 IEEE Visual Communications and Image Processing, VCIP 2011 |
DOI | |
出版ステータス | Published - 2011 |
イベント | 2011 IEEE Visual Communications and Image Processing, VCIP 2011 - Tainan 継続期間: 2011 11月 6 → 2011 11月 9 |
Other
Other | 2011 IEEE Visual Communications and Image Processing, VCIP 2011 |
---|---|
City | Tainan |
Period | 11/11/6 → 11/11/9 |
ASJC Scopus subject areas
- コンピュータ ビジョンおよびパターン認識