TY - GEN
T1 - Multi-stage power gating based on controlling values of logic gates
AU - Jin, Yu
AU - Kimura, Shinji
PY - 2011/12/1
Y1 - 2011/12/1
N2 - As the CMOS technology scales down, low power technologies have been expected to reduce leakage power of the CMOS device. Controlling value based power gating is a fine-grained active mode power gating approach using the controlling values of logic elements. In this method, one input of a logic gate taking the controlling value stops the power supply to the logic blocks generating other inputs. In this paper, we propose a multi-stage power gating method based on controlling values by stopping the power supply of several gates in the power controlled blocks. Experimental results show that the proposed approach increases the number of power-off elements by 26.7% in average compared with the single-stage power-gating method.
AB - As the CMOS technology scales down, low power technologies have been expected to reduce leakage power of the CMOS device. Controlling value based power gating is a fine-grained active mode power gating approach using the controlling values of logic elements. In this method, one input of a logic gate taking the controlling value stops the power supply to the logic blocks generating other inputs. In this paper, we propose a multi-stage power gating method based on controlling values by stopping the power supply of several gates in the power controlled blocks. Experimental results show that the proposed approach increases the number of power-off elements by 26.7% in average compared with the single-stage power-gating method.
UR - http://www.scopus.com/inward/record.url?scp=84860875305&partnerID=8YFLogxK
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U2 - 10.1109/ASICON.2011.6157127
DO - 10.1109/ASICON.2011.6157127
M3 - Conference contribution
AN - SCOPUS:84860875305
SN - 9781612841908
T3 - Proceedings of International Conference on ASIC
SP - 79
EP - 82
BT - Proceedings - 2011 IEEE 9th International Conference on ASIC, ASICON 2011
T2 - 2011 IEEE 9th International Conference on ASIC, ASICON 2011
Y2 - 25 October 2011 through 28 October 2011
ER -