抄録
This paper proposes a parallel processing scheme of electronic circuit simulation using direct method and evaluates performance of the scheme on a multiprocessor system named OSCAR (Optimally SCheduled Advanced MultiprocessoR) with centralized shared memory, distributed shared memory and local memory. A special purpose compiler is used to realize efficient near fine grain parallel processing of circuit simulation on an actual multiprocessor system. The compiler automatically generates a circuit simulation program from SPICE format input data. The compiler decomposes the program into tasks, analyzes data dependencies among tasks, schedules the tasks and generates optimized parallel machine code. In the parallel machine code generation process, a different machine code for each processor, which consists of task codes, data transfer codes and synchronization codes, is generated by using static scheduling result.
本文言語 | English |
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ページ | 272-276 |
ページ数 | 5 |
出版ステータス | Published - 1995 |
イベント | Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Victoria, BC, Can 継続期間: 1995 5月 17 → 1995 5月 19 |
Other
Other | Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing |
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City | Victoria, BC, Can |
Period | 95/5/17 → 95/5/19 |
ASJC Scopus subject areas
- 信号処理
- コンピュータ ネットワークおよび通信