抄録
Optical Network-on-Chip is a solution to for power and throughput bottlenecks of current technology. The higher bandwidth is achieved by the light speed transmissions, and the power required to transmit data in the optical domain is much lower. This is a disruptive technology solution to problems arising from silicon-based computing. In this paper, we present a fault-Tolerant optical router (FTTDOR) with its electrical control module towards the design of a highly-reliable low-power three dimensional Networks-on-Chip (PHENIC). FTTDOR uses redundancy only in critical locations, to assure accuracy of the packet transmission even after a faulty ring resonator appears. The proposed optical router is decomposed non-blocking, with minimal ring resonators, and requires no resonators for straight travel (East to West, North to South, and Up to Down, as well as their inverses). Simulation results show that the network can maintain a 98% throughput after 3% faults, and 89% after 20 % faults. These results come with a reduction of micro-ring resonators to 65% of the amount present in a conventional crossbar router. Simulation of the electrical control module and router show that it has a total area of around 20,000 μm2 and consumes 3.8mW at 600MHz.
本文言語 | English |
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ホスト出版物のタイトル | Proceedings - 2015 IEEE International Conference on Systems, Man, and Cybernetics, SMC 2015 |
出版社 | Institute of Electrical and Electronics Engineers Inc. |
ページ | 821-826 |
ページ数 | 6 |
ISBN(電子版) | 9781479986965 |
DOI | |
出版ステータス | Published - 2016 1月 12 |
外部発表 | はい |
イベント | IEEE International Conference on Systems, Man, and Cybernetics, SMC 2015 - Kowloon Tong, Hong Kong 継続期間: 2015 10月 9 → 2015 10月 12 |
Other
Other | IEEE International Conference on Systems, Man, and Cybernetics, SMC 2015 |
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国/地域 | Hong Kong |
City | Kowloon Tong |
Period | 15/10/9 → 15/10/12 |
ASJC Scopus subject areas
- 人工知能
- コンピュータ ネットワークおよび通信
- エネルギー工学および電力技術
- 情報システムおよび情報管理
- 制御およびシステム工学