TY - GEN
T1 - Practical integration method of active devices on SOI photonic integrated circuits
AU - Kita, Tomohiro
AU - Abe, Masahiro
AU - Ohtera, Yasuo
AU - Yamada, Hirohito
PY - 2010/12/1
Y1 - 2010/12/1
N2 - We propose a method of mounting LD chips on SOI substrate and discuss about the optical coupling loss between LDs and Si photonic-wire waveguides. In our scheme, light output from an LD is coupled to the optical waveguides through spot-size-converters (SSC). The simulations show that a minimum optical coupling loss of 1.6 dB and an offset tolerance of ±0.7 μm for the LD chip positioning can be achieved. We measured the optical coupling loss, confirming the validity of the simulations.
AB - We propose a method of mounting LD chips on SOI substrate and discuss about the optical coupling loss between LDs and Si photonic-wire waveguides. In our scheme, light output from an LD is coupled to the optical waveguides through spot-size-converters (SSC). The simulations show that a minimum optical coupling loss of 1.6 dB and an offset tolerance of ±0.7 μm for the LD chip positioning can be achieved. We measured the optical coupling loss, confirming the validity of the simulations.
UR - http://www.scopus.com/inward/record.url?scp=78651371680&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=78651371680&partnerID=8YFLogxK
U2 - 10.1109/GROUP4.2010.5643354
DO - 10.1109/GROUP4.2010.5643354
M3 - Conference contribution
AN - SCOPUS:78651371680
SN - 9781424463442
T3 - IEEE International Conference on Group IV Photonics GFP
SP - 275
EP - 277
BT - 2010 7th IEEE International Conference on Group IV Photonics, GFP 2010
T2 - 2010 7th IEEE International Conference on Group IV Photonics, GFP 2010
Y2 - 1 September 2010 through 3 September 2010
ER -