TY - JOUR
T1 - Reconfigurable adaptive FEC system based on reed-solomon code with interleaving
AU - Shimizu, Kazunori
AU - Togawa, Nozomu
AU - Ikenaga, Takeshi
AU - Goto, Satoshi
PY - 2005/7
Y1 - 2005/7
N2 - This paper proposes a reconfigurable adaptive FEC system based on Reed-Solomon (RS) code with interleaving. In adaptive FEC schemes, error correction capability t is changed dynamically according to the communication channel condition. For given error correction capability t, we can implement an optimal RS decoder composed of minimum hardware units for each t. If the hardware units of the RS decoder can be reduced for any given error correction capability t, we can embed as large deinterleaver as possible into the RS decoder for each t. Reconfiguring the RS decoder embedded with the expanded deinterleaver dynamically for each error correction capability t allows us to decode larger interleaved codes which are more robust error correction codes to burst errors. In a reliable transport protocol, experimental results show that our system achieves up to 65% lower packet error rate and 5.9% higher data transmission throughput compared to the adaptive FEC scheme on a conventional fixed hardware system. In an unreliable transport protocol, our system achieves up to 76% better bit error performance with higher code rate compared to the adaptive FEC scheme on a conventional fixed hardware system.
AB - This paper proposes a reconfigurable adaptive FEC system based on Reed-Solomon (RS) code with interleaving. In adaptive FEC schemes, error correction capability t is changed dynamically according to the communication channel condition. For given error correction capability t, we can implement an optimal RS decoder composed of minimum hardware units for each t. If the hardware units of the RS decoder can be reduced for any given error correction capability t, we can embed as large deinterleaver as possible into the RS decoder for each t. Reconfiguring the RS decoder embedded with the expanded deinterleaver dynamically for each error correction capability t allows us to decode larger interleaved codes which are more robust error correction codes to burst errors. In a reliable transport protocol, experimental results show that our system achieves up to 65% lower packet error rate and 5.9% higher data transmission throughput compared to the adaptive FEC scheme on a conventional fixed hardware system. In an unreliable transport protocol, our system achieves up to 76% better bit error performance with higher code rate compared to the adaptive FEC scheme on a conventional fixed hardware system.
KW - Adaptive FEC
KW - Dynamic reconfigurable system
KW - Reed-solomon code with interleaving
UR - http://www.scopus.com/inward/record.url?scp=26044476675&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=26044476675&partnerID=8YFLogxK
U2 - 10.1093/ietisy/e88-d.7.1526
DO - 10.1093/ietisy/e88-d.7.1526
M3 - Article
AN - SCOPUS:26044476675
SN - 0916-8532
VL - E88-D
SP - 1526
EP - 1537
JO - IEICE Transactions on Information and Systems
JF - IEICE Transactions on Information and Systems
IS - 7
ER -