Register allocation technique using register existence graph

A. Koseki*, H. Komastu, Y. Fukazawa

*この研究の対応する著者

研究成果: Conference article査読

抄録

Optimizing compilation is very important for generating code sequences in order to utilize the characteristics of processor architectures. One of the most essential optimization techniques is register allocation. In register allocation that takes account of instruction-level parallelism, anti-dependences generated when the same register is allocated to different variables, and spill code generated when the number of registers is insufficient should be handled in such a way that the parallelism in a program is not lost. In our method, we realized register allocation using a new data structure called the register existence graph, in which the parallelism in a program is well expressed.

本文言語English
ページ(範囲)404-411
ページ数8
ジャーナルProceedings of the International Conference on Parallel Processing
出版ステータスPublished - 1997
イベントProceedings of the 1997 International Conference on Parallel Processing - Bloomington, IL, USA
継続期間: 1997 9月 111997 9月 15

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ

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