TY - GEN
T1 - Remapping method to minimize makespan of simulink model for embedded multi-core systems
AU - Kojima, Sasuga
AU - Edahiro, Masato
AU - Azumi, Takuya
PY - 2018
Y1 - 2018
N2 - Multi-core processors have been increasingly used to reduce power consumption and improve performance in embedded systems. In addition, a use of Model-Based Development has been increasing. Relative to these trends, Model-Based Parallelizer (MBP) has an essential role in parallelizing applications (i.e., Simulink blocks). MBP maps Simulink blocks to cores at the model level using various information. Generally, mapping blocks to cores is considered an NP-hard graph optimization problem; thus, MBP uses a heuristic method to solve it. A heuristic method can solve problems at high speed, but it is often not accurate. Therefore, this paper proposes two methods to improve results of MBP. The first method remaps blocks to cores based on the results of MBP. The second method determines an execution order that can finish the entire process faster than existing methods. Evaluations demonstrate that the proposed methods can obtain better results than existing methods in terms of Speedup and Load-Balancing.
AB - Multi-core processors have been increasingly used to reduce power consumption and improve performance in embedded systems. In addition, a use of Model-Based Development has been increasing. Relative to these trends, Model-Based Parallelizer (MBP) has an essential role in parallelizing applications (i.e., Simulink blocks). MBP maps Simulink blocks to cores at the model level using various information. Generally, mapping blocks to cores is considered an NP-hard graph optimization problem; thus, MBP uses a heuristic method to solve it. A heuristic method can solve problems at high speed, but it is often not accurate. Therefore, this paper proposes two methods to improve results of MBP. The first method remaps blocks to cores based on the results of MBP. The second method determines an execution order that can finish the entire process faster than existing methods. Evaluations demonstrate that the proposed methods can obtain better results than existing methods in terms of Speedup and Load-Balancing.
KW - Embedded systems
KW - Model-based development
KW - Multi-core
UR - http://www.scopus.com/inward/record.url?scp=85048427343&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85048427343&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:85048427343
T3 - Proceedings of the 33rd International Conference on Computers and Their Applications, CATA 2018
BT - Proceedings of the 33rd International Conference on Computers and Their Applications, CATA 2018
A2 - Lee, Gordon
A2 - Miller, Les
PB - The International Society for Computers and Their Applications (ISCA)
T2 - 33rd International Conference on Computers and Their Applications, CATA 2018
Y2 - 19 March 2018 through 21 March 2018
ER -