TY - GEN
T1 - Ultralow-voltage operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM down to 0.37 v utilizing adaptive back bias
AU - Yamamoto, Y.
AU - Makiyama, H.
AU - Shinohara, H.
AU - Iwamatsu, T.
AU - Oda, H.
AU - Kamohara, S.
AU - Sugii, N.
AU - Yamaguchi, Y.
AU - Mizutani, T.
AU - Hiramoto, T.
PY - 2013
Y1 - 2013
N2 - We demonstrated record 0.37V minimum operation voltage (Vmin) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks to the small variability of SOTB (AVT∼1.3 mVμm) and adaptive back biasing (ABB), Vmin was lowered down to ∼0.4 V regardless of temperature. Both fast access time and small standby leakage were achieved by ABB.
AB - We demonstrated record 0.37V minimum operation voltage (Vmin) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks to the small variability of SOTB (AVT∼1.3 mVμm) and adaptive back biasing (ABB), Vmin was lowered down to ∼0.4 V regardless of temperature. Both fast access time and small standby leakage were achieved by ABB.
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M3 - Conference contribution
AN - SCOPUS:84883365015
SN - 9784863483477
T3 - Digest of Technical Papers - Symposium on VLSI Technology
SP - T212-T213
BT - 2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers
T2 - 2013 Symposium on VLSI Technology, VLSIT 2013
Y2 - 11 June 2013 through 13 June 2013
ER -