Voltage-island driven floorplanning considering level-shifter positions

Bei Yu*, Sheqin Dong, Satoshi Goto, Song Chen

*この研究の対応する著者

研究成果: Conference contribution

11 被引用数 (Scopus)

抄録

Power optimization has become a significant issue when the CMOS technology entered the nanometer era. Multiple-Supply Voltage (MSV) is a popular and effective method for power reduction. Level shifters may cause area and Interconnect Length Overhead(ILO), and should be considered during floorplanning and post-floorplanning stages. In this paper, we propose a two phases framework VLSAF to solve voltage and level shifter assignment problem. At floorplanning phase, we use: a convex cost network flow algorithm to assign voltage; a minimum cost flow algorithm to assign level shifter. At post-floorplanning phase, a heuristic method is adopted to redistribute white spaces and calculate the positions and shapes of level shifters. Experimental results show VLSAF is effective.

本文言語English
ホスト出版物のタイトルProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
ページ51-56
ページ数6
DOI
出版ステータスPublished - 2009
イベント19th ACM Great Lakes Symposium on VLSI, GLSVLSI '09 - Boston, MA
継続期間: 2009 5月 102009 5月 12

Other

Other19th ACM Great Lakes Symposium on VLSI, GLSVLSI '09
CityBoston, MA
Period09/5/1009/5/12

ASJC Scopus subject areas

  • 工学(全般)

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